<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Fpga on Noureddine RAMDI</title><link>https://ramdi.fr/tags/fpga/</link><description>Recent content in Fpga on Noureddine RAMDI</description><generator>Hugo</generator><language>en</language><lastBuildDate>Sat, 23 May 2026 20:41:27 +0000</lastBuildDate><atom:link href="https://ramdi.fr/tags/fpga/index.xml" rel="self" type="application/rss+xml"/><item><title>Building an open-source 10.5 GHz phased array radar with FPGA signal processing</title><link>https://ramdi.fr/github-stars/building-an-open-source-10-5-ghz-phased-array-radar-with-fpga-signal-processing/</link><pubDate>Sat, 23 May 2026 20:41:14 +0000</pubDate><guid>https://ramdi.fr/github-stars/building-an-open-source-10-5-ghz-phased-array-radar-with-fpga-signal-processing/</guid><description>AERIS-10 is an open-source X-band phased array radar system with FPGA-based real-time processing and Python GUI. Hardware and firmware are fully available for advanced radar engineering.</description></item><item><title>Recreating the 3dfx Voodoo GPU in SpinalHDL for FPGA and cycle-accurate simulation</title><link>https://ramdi.fr/github-stars/recreating-the-3dfx-voodoo-gpu-in-spinalhdl-for-fpga-and-cycle-accurate-simulation/</link><pubDate>Mon, 04 May 2026 10:23:02 +0000</pubDate><guid>https://ramdi.fr/github-stars/recreating-the-3dfx-voodoo-gpu-in-spinalhdl-for-fpga-and-cycle-accurate-simulation/</guid><description>SpinalVoodoo rebuilds the classic 3dfx Voodoo Graphics GPU in SpinalHDL, targeting FPGA synthesis and cycle-accurate simulation with a focus on perspective-corrected texture mapping and fixed-point interpolation.</description></item><item><title>Digital: a Java event-driven logic simulator solving Logisim's stability issues</title><link>https://ramdi.fr/github-stars/digital-a-java-event-driven-logic-simulator-solving-logisim-s-stability-issues/</link><pubDate>Mon, 04 May 2026 10:23:01 +0000</pubDate><guid>https://ramdi.fr/github-stars/digital-a-java-event-driven-logic-simulator-solving-logisim-s-stability-issues/</guid><description>Digital is a Java-based digital logic designer and circuit simulator with an event-driven engine and unique settling phase, fixing Logisim&amp;rsquo;s instability issues and supporting HDL and FPGA exports.</description></item><item><title>Shrike: an open FPGA-MCU development board bridging reconfigurable logic and microcontrollers</title><link>https://ramdi.fr/github-stars/shrike-an-open-fpga-mcu-development-board-bridging-reconfigurable-logic-and-microcontrollers/</link><pubDate>Mon, 04 May 2026 10:23:01 +0000</pubDate><guid>https://ramdi.fr/github-stars/shrike-an-open-fpga-mcu-development-board-bridging-reconfigurable-logic-and-microcontrollers/</guid><description>Shrike is a low-cost open-source FPGA development board paired with microcontrollers, enabling beginners to explore heterogeneous FPGA-MCU computing with accessible hardware and open toolchains.</description></item></channel></rss>